1. Field of the Invention
The present invention relates to a semiconductor device provided with an output circuit and a source or sink current auxiliary circuit for the output circuit.
2. Description of the Related Art
As shown in FIG. 7, there is provided an output circuit 11 for driving in the output stage of a semiconductor device 10. In the circuit 11, a PMOS transistor 12 and an NMOS transistor 13 are serially connected between a power supply line VDD and a grounded line. Gate potentials of the transistors 12 and 13 are controlled by a logic circuit 14 in response to an input signal AO and an output enable signal OE. The drains of the transistors 12 and 13 are commonly connected through an output pad 15 to an output 16. The output 16 is connected to an input terminal 18 of another circuit 17.
In a case where the output enable signal OE is low, the gates of the transistors 12 and 13 are respectively high and low with no dependency on the signal AO, whereby the transistors 12 and 13 are off and the output DO of the output circuit 11 is in a high impedance state.
In a case where the output enable signal OE is high, the logic circuit 14 is in a through state and thereby, if the signal AO is low, the transistors 12 and 13 are respectively on and off and a source current IH flows out from the power supply line VDD through the PMOS transistor 12 to the circuit 17, while if the signal AO is high, the transistors 12 and 13 are respectively off and on and a sink current IL flows from the circuit 17 though the NMOS transistor 13 to the grounded line.
CL depicted with dotted lines shows a load capacitance viewed from the output of the output circuit 11. The load capacitance CL is large since it includes capacitance of the output pad 15 and the output 16 having comparatively large areas and capacitance of comparatively long line connected to them and therefore, a signal waveform at the input terminal 18 is rounded and an operating speed is reduced.
In a semiconductor device, a higher operating speed is demanded and if, in order to achieve the demand, the source current IH and the sink current IL are both increased, the power supply potential VDD is temporarily lowered when the source current IH flows and the grounded potential is temporarily raised when the sink current IL flows, resulting in generating power supply noise.
Further, in order to increase the currents IH and IL, the transistors 12 and 13 have to be larger in size and therefore, a semiconductor chip area increases, which in turn entails a higher cost in production.